IS-95A Chip-Set. -System-Level Specification Development -Design of Two-Chip (RF/IF) Solution in Si BiCMOS process IS-136 Chip-Set Development. -Customer provided System-Level Specifications -Design of Two-Chip solution in Si BiCMOS process Development of an Ultra Low Cost, Low Power Consumption ISM Band Frequency Hopping Spread Spectrum Radio System. -System Design and Simulation -Component Selection -Interface with Microprocessor -Prototype Development and Testing Development of an IC for Cable Modem Applications. Development of a 1.57 GHz Satellite Receiver on a PCMCIA Card. -Design of Si Bipolar Based RF Front-End IC -Integration with Backend Digital Processign IC Development of an S-Band Phased Locked Loop (PLL) IC using 0.35um CMOS Technology. Front-End Receiver Blocks in BiCMOS Technology Design and Development of Cellular Base-Station Low Noise Amplifier Product. -Design to Performance and Cost Goals -Prototype Development and Testing Development of a Dual-Band PLL using 0.35um and 0.25um CMOS Technology |